Proceeding of the Faculty of technical Sciences, Novi Sad

Electrotechnical and Computer Engineering

Vol. 38 No. 12 (2023): Proceedings of the Faculty of Technical Sciences

IMPLEMENTATION OF CACHE COHERENCE PROTOCOL

  • Jana Janković
DOI:
https://doi.org/10.24867/25BE27Jankovic
Submitted
September 8, 2023
Published
2023-12-06

Abstract

This paper presents the implementation of the MESI protocol for cache coherence, as well as the rest of the multiprocessor system composed of RISC-V processors and two levels of cache memory. Behavioral simulation was used to test the behavior of the system in a situation where modified block is evicted from the second level cache.

References

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