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Electrotechnical and Computer Engineering

Vol. 39 No. 09 (2024): Proceedings of Faculty of Technical Sciences

HYPERVISOR IMPLEMENTATION AND TESTING OF PARALLEL PARTITION EXECUTION ON ZEDBOARD PLATFORM

DOI:
https://doi.org/10.24867/28BE38Radonjic
Submitted
April 11, 2024
Published
2024-09-06

Abstract

This article describes implementation and functionality of a hypervisor on the ZedBoard development board. Serving as a layer between software and hardware, the hypervisor optimizes resource utilization on both sides, facilitating the concurent execution of multiple applications on the physical hardware. The Earliest Deadline First (EDF) algorithm is employed for scheduling partitions (tasks) across multiple processor cores. The article details the system structure and provides steps for implementing the hypervisor on the target board. Partition communication, interactions and scheduling modes are tested and thoroughly explained.

References

[1] https://www.vmware.com/topics/glossary/content/hypervisor.html, април 2024.
[2] https://digilent.com/reference/programmable-logic/zedboard/reference-manual, април 2024.
[3] https://www.baeldung.com/cs/scheduling-earliest-deadline-first , април 2024.
[4] https://www.xilinx.com/products/silicon-devices/soc/zynq-ultrascale-mpsoc.html , април 2024.