Electrotechnical and Computer Engineering
Vol. 39 No. 09 (2024): Proceedings of Faculty of Technical Sciences
IMPLEMENTACIJA I VERIFIKACIJA SISTEMA ZA PROCESIRANJE PAKETA PRIMENOM FORMALNIH METODA
Abstract
The paper presents the implementation of the packet processing system, which includes the construction
of packets based on input data and configuration, and the parsing of incoming packets in order to determine the existence of errors during transmission. The system was verified using the FPV formal technique (Formal property verification), while the fault tolerance was tested using the FSV formal technique (Formal Safety Verification).
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