DEVELOPMENT OF THE PROCESSOR INTEGRATION MODULE IN THE CONFIGURABLE HALOWONE™ WI-FI IP PLATFORM

Abstract

This thesis represents the development of the processor wrapper that encapsulates both xTensa and RISC-V CV32e40p with emphasis on the wrapper with the CV32E40P processor. The paper describes all the steps required to develop such a system, from the initial research of architectures and functionalities of different processors to the integration of the processor wrapper into the HaLowOne™ platform.